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                      A multichannel IBMPC packet interface
                      -------------------------------------


                              by: Henk Peek, PA0HZP
                   PB 329, 1440 AH Purmerend, The Netherlands
                  AX25 smtp: henk@PA0HZP  uucp: henkp@nikhef.nl



        Abstract 

             This paper describes a universal medium speed packet
        interface for the Isa (IBMPC) bus.  The system consists of one
        or more 4 channel Isa bus boards and external modems.  Multiple
        boards can be interconnected to form one single interface with a
        single interrupt vector and daisy chain interrupt priority
        logic.  
        General software can be used. There are no special
        initialization actions required.  
        The connections  between the Isa bus boards and the external
        modems are opto isolated.  

        Introduction 

             Many packet stations take an interest in the use of more
        speeds and frequencies.  However addition of an extra TNC for
        each mode and frequency used simultaneously is necessary. Over
        four TNCs the async ports of the IBMPC will be not standardize
        and costly.  
        There is an other solution: direct HDLC ax25 interfaces.  But,
        it is difficult to find cheap HDLC boards with more then two
        HDLC channels.  Otherwise the number of available Isa slots
        define in large stations the channel limit.  
        A few years ago PE1CHL has designed his own multichannel Atari
        AX25 packet interface (ref 1). The design described below is
        based on the experience with the PE1CHL interface.  

        The OptoPcScc interface 

             The OptoPcScc is a short size Isa interface board equipped
        with 2 * 8530 SCC, offering four channels on a board. Small
        stations operate with one board and larger stations with
        multiple boards. Those multiple boards can be coupled to a
        single multichannel interface with one common interrupt and
        interrupt vector fetch mechanism.  The 8530 chip handles
        asynchronous and synchronous formats.  Each channel has its own
        external clock divider for full duplex synchronous operation.  
        An OptoPcScc board is interfaced to the IO port space of the Isa
        bus, mapping both SCCs to 8 ports.  The base IO port of the
        first SCC control port is 0x150.  The address of the adjunct
        data port is the next IO port.  Each following SCC channel

        


	Eighth ARRL Amateur Radio Computer Networking Conference
        


        control port is adjacent to the data port of the SCC channel.  
        For the second OptoPcScc board a jumper adds 8 to the board base
        IO port.  In the few situations that more than 8 SCC channels
        are required, the flexibility of the ISA bus decoder PAL can be
        used to address the adjunct ranges of IO ports.  
        One large multichannel SCC interface can be constructed from
        multiple OptoPcScc boards by daisy chaining the INC to the OUTC
        connectors with short 5 wires cables. The first board in the
        chain has a free INC connector and is automatically the master
        of the chain. All other boards are slaves and the last one has a
        free OUTC connector.  The master OptoPcScc board generates the
        Isa bus interrupt for all the boards.  
        Each OptoPcScc board has a latch for the generation of the
        intack signal. All the intack latches are set by writing to port
        0x168.  The intack signal indicates an active interrupt
        acknowledge cycle.  During this cycle, the interrupt vector
        select chain settles.  A read command to port 168 places the SCC
        interrupt vector on the Isa bus and resets afterwards the intack
        latches.  The interrupt vector read cycle selects only one
        single board databuffer by monitoring the board IEI1 (Interrupt
        Enable In) for HIGH and the board IEO2 (Interrupt Enable Out)
        for LOW.  A single 8530 SCC on a board can be used by
        interconnecting IEO pin 6 and IEI pin 7 of the absent 8530.
        When your software doesn't support the intack latch interrupt
        fetch mechanism, it can apply the general but slower method of
        polling each 8530 chip for interrupt.  

        Opto isolated modem interface 

             Most multiple transmitter packet stations have groundloop
        problems.  In practice this results in whipping the TNC settings
        when you are working on the HF bands, or PC noise radiated by
        the modem cables.  Opto isolators, introduced in an 8 channel
        backbone switch for the Dutch packet network, are applied at the
        OptoPcScc board to minimize these effects.  The PC847 opto
        couplers are cheap and support maximum 20K baudrate.  Higher
        speeds can be supported by using surface mount opto couplers on
        a small surface mount DIL board.  The high speed Rx and Tx opto
        couplers are to expensive for general use.  
        An Isa interface board has a limited space for back side
        connectors.  This is one of the reasons to reduce the number of
        modem signals, to a minimum: Rx, Tx, DCD and RTS. Some modems
        require a synchronous Tx clock. Only phase and the frequency are
        not standardized.  For halfduplex operation you can generate the
        modem transmit clock from a small interface.  The SCC receiver
        phaselock is used to synchronize the SCC transmitter clock to
        the interface clock.  To play this trick, the SCC channel must
        be placed in the external loopback mode and an HDLC synchronize
        flag signal, generated from the interface clock, must be applied
        to the SCC Rx input.  The same interface can be used to convert
        the current loop signals to RS232 or TTL signals.  
        A common 37 pin Male D connector is used for the modem

        


	Eighth ARRL Amateur Radio Computer Networking Conference
        


        connections of the OptoPcScc board. The modems have a 9 pin
        female D connector.  The connection between the OptoPcScc and
        the modems can be made of a single flatcable which is spliced at
        the modem side in four cables.  In most situations it is much
        safer to use shielded cables to minimize noise radiation and RF
        pickup.  The shield of the modem cables must be only on one side
        connected to one of the ground pins of the 9 pin modem cable D
        connector, the other side must not be connected to the 37 pin D
        connector and isolated from each other.  

        External V202 modem with opto interface 

             This TCM3105JL modem design is included in this paper to
        show that is simple, to realize a currentloop modem interface.
        You must have currentloop V202 modems for the most frequencies
        which you are using the OptoPcScc board.  The number of
        necessary components is low making it is easier to realize a new
        modem instead of interface an existing one.  
        The modem is made on an 4 * 7cm single sided printed circuit
        board.  On one short side the 9 pin female D connector for
        currentloop data is mounted and on the other side an 5 pin audio
        DIN for the transceiver connection. The transceiver cable also
        connects the +12V power supply.  The modem uses internally +5V
        supply. The +12V supply  only has to meet the specifications of
        the 78L05 regulator.  The low power consumption of the modem can
        be supplied by nearly any transceiver or portofoon.  
        In the preferred mode of operation (J1 closed), this modem
        generates  only audio with RTS active. In this mode more modems
        can be operated in parallel by wiring the modem transceiver
        sides parallel.  An transmit audio switch is not necessary.  The
        modem can also generate continuous audio output with J1 open.  
        A 30 second watchdog timer is incorporated.  The PTT switch is a
        BS170 mosfet protected by a 47V zener diode.  The on resistance
        is low enough to key nearly any transceiver.  

        Practical experience 

             This project is build on Printed Circuit Boards. At the
        time of writing (20 August 1989) a few boards are running.
        Series of double sided plated-through printed circuit boards
        with gold plated edge connector fingers will be made.  Contact
        the author for availability.  

        Acknowledgments 

             Thanks to Rob Janssen PE1CHL for the long discussions which
        started this design and for the SCC packet driver.  

        References 

        1) Schematics of the PE1CHL Atari modem design. Unpublished,
        direct from PE1CHL.  


        
